1. Field of the Invention
The present invention relates to improvements in cooling of electrical devices by heat pipe means.
2. Description of the Prior Art
The best known art which is prior to that of the present invention is contained in the final technical report, dated September 1973, under Contract DAAB07-72-C-0021 with the United States Army Electronics Command, Fort Monmouth, New Jersey. This technical report is identified as ECOM-0021-F, and by Reports Control Symbol OSD-1366. It is entitled "Investigation of Novel Heat Removal Techniques for Power Transistors", and prepared by M. A. Merrigan. Copy Number 191 of this report, filed concurrently herewith, is made a part of the file wrapper hereof.
As was stated in that report, high power solid state devices have been effectively cooled by spreading out the thermal junction so the average heat flux density is low enough to provide a low thermal resistance. Solid state devices have been developed for use at high frequency by limiting the device capacitance through minimization of device dimensions. Therefore, the problem in the design of high power, high frequency solid state devices is to overcome the inherent incompatibility between the frequency and thermal power requirements.
In the colling of high power solid state devices, such as power transistors, the overall thermal resistance from the device junction to the surrounding ambient environment may be considered in terms of a series of thermal resistances. In devices designed for higher operating frequencies, the internal resistance from junction to case will establish the limits of device performance.
Changes in chip design, to limit collector-to-base capacitance and to distribute the power dissipation more uniformly over the chip surface, have raised the upper frequency limits for high power transistors by allowing the thermal dissipation area to approach the total chip area. Current trends in transistor design involve the use of overlay emitter electrode construction and built-in diode compensation to permit higher power and higher temperature operation. The particular techniques used vary widely from manufacturer to manufacturer, even for what is nominally the same transistor. However, all of the techniques used involve distribution of the transistor junction over the surface of the chip while controlling the collector-to-base capacitance. This generally means placing limits on the chip size which, in turn, causes thermal limits on device performance. Elimination of this frequency power limit within the restrictions of present chip design required application of heat pipe cooling methods directly at the chip surface to provide a mechanism for minimization of temperature irregularities over the chip surface and reduction of the junction-to-case thermal resistance. The objective of the program was the development and demonstration of heat pipe techniques for power transistors operating in the VHF range with dissipation power of 25 watts or more. Program goals were to reduce junction temperature of 33% at a given power level over conventionally packaged devices without significant change in electrical characteristics. Volume and weight restrictions were four times and five times, respectively, of equivalent hermetically sealed devices.
Heat pipe cooling techniques were selected for the power transistor program primarily due to the high thermal conductances they provide in high power density applications. In general, a heat pipe may be defined as any closed device that thermally connects a heated area with a comparatively cold area by a vaporizable liquid, or working fluid, with continuous return of the condensate to the heated area by capillary action. The basic heat pipe structure consists of a sealed enclosure lined with a porous or other wick material which is wet with a suitable volatile liquid. No gas other than the pure vapor of the liquid is present. At normal vapor flow velocity the pressure will be nearly uniform throughout the vapor space. The temperature along the wick surface will then be essentially constant at the equilibrium temperature for the liquid-vapor interface at the given pressure.
Addition of heat at any point will cause the temperature throughout the enclosure to rise through local evaporation and condensation onto all cooler areas. Regions of the heat pipe where heat is introduced into the system are the evaporator sections, and those where heat removal takes place are the condenser sections. Several discrete evaporator and/or condenser sections can exist on a single heat pipe. The mechanisms affecting the flow of heat axially along the heat pipe are all extremely rapid and the adjustment of temperature consequently occurs almost instantaneously.
The most fundamental capability offered by heat pipes to the cooling of electronic components is the achievement of extremely high values of thermal conductance. Heat pipes have an additional advantage as thermal conductors in that they may utilize non-metallic, non-electrically conductive materials in order to maintain electrical isolation while retaining high thermal conductance. Another useful characteristic is the capability for acceptance of widely varying thermal fluxes without variation in temperature. Power density variation of 10 to 1 is possible in the evaporator area of a heat pipe without appreciable variation of evaporator surface temperature. This insensitivity to local variations in input power may be exploited in the reduction of local temperature variation or hot spotting.
Of the various characteristics of heat pipes, the one of most concern in power transistor cooling applications will be the high limiting values of local heat. The wick surface nearest the junction of the transistor will be exposed to extremely high values of heat flux. As the heat input in this evaporator section of the heat pipe is increased, the temperature at the liquid-wick-wall interface will rise to the point where nucleate boiling occurs in the adjacent liquid. The heat pipe will continue to operate if the capillary and buoyancy forces are great enough to cause convection of the vapor bubbles through the wick and into the vapor core. The high limiting values of local heat flux permit application of heat pipes to solid state device cooling. A schematic of a heat pipe configuration for the above-described application is shown in FIG. 1 of the report.
A glass fiber (Refrasil) wick was used in the heat pipe tests. The wick consisted of fiber glass strand bundles 0.004 inches (0.01 cm) in diameter spaced 0.02 inches (0.041 cm) apart over the chip surface. The open configuration was chosen because of the high heat flux density at the chip surface and low thermal conductivity of the dielectric wick material. The individual strand bundles served as a means of transfer-ring fluid from the region alongside the chip which served as a condenser when the device was base cooled to the chip surface. Surface forces distributed the fluid over the chip surface providing a flow distribution to the largest part of the chip surface while maintaining a minimum thermal path to the vapor space. A schematic of the wick placement and fluid distribution is shown in FIG. 14 of the report. The remainder of the header was covered with a mat of glass fiber to provide fluid storage and return mechanism. The glass fibers were mechanically retained on the chip surface by a surrounding ring.
Alternatively, as shown in FIG. 17 of the report, fabrication of the wick structure was accomplished by laying the primary chip wicking strands across the chip surface and retaining their ends at the edge of the substrate using epoxy resin as a binding agent. A cross strand parallel to the chip edge was then overlayed to insure good contact of the primary strands with the chip surface. This strand was also epoxied in place at the edge. The remainder of the chip mounting substrate was then covered with a pad of woven glass fiber for condenser wicking. The inner surface of the case cap was lined with a layer of glass fiber retained on the under surface of the cap by a resin bond. The case liner was allowed to project slightly below the cap surface to insure contact with the wick structure surrounding the chip. The cap was then welded in place on the header to seal the device. The required amount of the heat pipe working fluid was injected into the case.
The reported work demonstrated the feasibility of heat pipe cooling techniques for high frequency power transistor applications. A 6 dB gain with 33% reduction in junction termperature at 25 watts CW power were achieved within a standard transistor case (TO-60) and without appreciable increase in transistor weight. Electrical characteristics of the transistors appeared to be essentially unchanged by the presence of the heat pipe wick and fluid materials in contact with the chip surface.
Although the above work demonstrated the feasibility of applying heat pipe principles to electronic devices, its main disadvantage is in the specific use of fiber glass material as the heat pipe wick. Specifically, it was not possible to bring the wick material and, therefore, the working fluid, into intimate contact with each and every device surface because of bonding problems and the irregularity of the device due to topographical features and wiring connections. As a consequence, hot spots still exist to place an upper limit on the desired power densities. In addition, for high frequency devices, e.g. of 1 GHz and upwards, the glass fibers would interfere with fine lead wires and the active devices by affecting the electrical characteristics thereof. Therefore, such devices were limited to approximately a power density 1 kW/cm.sup.2.